CODA Rewrites Transformer Execution: One GEMM-Epilogue to Rule Them All

Hacker News May 2026
Source: Hacker Newsinference optimizationArchive: May 2026
A revolutionary execution paradigm from CODA redefines the Transformer as a single fused GEMM-Epilogue program, not a chain of independent operators. By deeply merging matrix multiplication with subsequent operations like Softmax and LayerNorm, CODA eliminates inter-operator memory reads and writes, promising over 40% inference latency reduction. This breakthrough reshapes the foundational logic of neural network compilation, paving the way for large-scale models on consumer devices.

For years, the AI industry has treated the Transformer as a sequence of discrete operations: a matrix multiply, a write to global memory, a Softmax read, another write, a LayerNorm read, and so on. This operator-by-operator execution pattern, while simple to implement, is fundamentally wasteful. Each intermediate result is shuttled through the memory hierarchy, consuming bandwidth and adding latency that dwarfs the actual compute time. CODA, a new compiler and execution framework developed by a team of systems researchers, proposes a radical departure: treat the entire Transformer module as a single, fused GEMM-Epilogue program. In this paradigm, the matrix multiplication (GEMM) and its subsequent element-wise or reduction operations (the epilogue) are compiled into one monolithic kernel. Data flows directly from the GEMM's accumulator registers into the epilogue's compute units, bypassing global memory entirely. The result is a dramatic reduction in memory traffic and a corresponding drop in inference latency. Early benchmarks show a 40-50% reduction in end-to-end latency for Transformer-based models, with even greater gains for memory-bound architectures like those used in video generation and long-context language models. CODA does not require new hardware; it is a pure software innovation that rethinks how we compile and execute neural networks. It represents a shift from operator-level optimization to program-level fusion, a leap as significant as the introduction of cuDNN for convolutional networks. For product innovation, this means that running a 70-billion-parameter model on a single consumer-grade GPU is no longer a distant fantasy. For the broader AI ecosystem, CODA could spawn a new 'compilation-as-a-service' business model, where model providers sell not just weights but optimized, fused execution plans tailored to specific hardware. The core insight is profound: when model scale hits the physical limits of memory bandwidth, true breakthroughs come from re-architecting the computational paradigm, not just adding more transistors.

Technical Deep Dive

CODA's core innovation lies in its treatment of the Transformer block as a single computational graph that is compiled into one fused GPU kernel. Traditional execution, as implemented in frameworks like PyTorch or TensorFlow, decomposes a Transformer layer into a sequence of operators: GEMM (for Q, K, V projections), GEMM (attention scores), Softmax, GEMM (attention output), GEMM (feed-forward), ReLU or GELU, and LayerNorm. Each operator writes its output to global memory (HBM) and the next operator reads it back. This pattern is extremely inefficient because HBM bandwidth is orders of magnitude slower than on-chip SRAM or register file bandwidth.

CODA's approach is to use a compiler that performs whole-block fusion. It takes the entire compute graph of a Transformer layer and maps it onto a single CUDA kernel. The key enabler is a technique called 'register-level dataflow'. Instead of writing intermediate results to HBM, CODA keeps them in the GPU's register file or shared memory. For example, the output of the first GEMM (the attention scores) is not written to HBM; it is consumed immediately by the Softmax epilogue, which operates on the same registers. The Softmax output then feeds directly into the next GEMM (attention output) without a memory round-trip.

This is not trivial. The challenge is that the GPU's register file is limited (typically 256KB per SM), and a full Transformer block involves many intermediate tensors. CODA solves this through a combination of tiling and scheduling. It breaks the computation into small tiles that fit in registers, and carefully schedules the order of operations to maximize data reuse. The compiler uses a polyhedral model to analyze dependencies and determine the optimal tile size and execution order.

A key technical detail is the handling of Softmax. Softmax requires a global reduction over the sequence dimension (to compute the maximum and sum), which normally forces a memory write. CODA implements a 'online' Softmax that computes the reduction incrementally within the tile, using a technique similar to the 'safe Softmax' used in FlashAttention. This allows the Softmax to be fused without breaking the dataflow.

For those interested in exploring similar ideas, the open-source repository triton-lang/triton (over 14,000 stars) provides a language for writing fused kernels, though it operates at a lower level than CODA's whole-block fusion. Another relevant project is OpenAI/triton, which has been used to implement FlashAttention. CODA builds on these ideas but takes them to the next level by fusing the entire block, not just the attention mechanism.

Performance Benchmarks:

| Model | Baseline Latency (ms) | CODA Latency (ms) | Latency Reduction | Memory Bandwidth Utilization |
|---|---|---|---|---|
| LLaMA-7B (batch=1) | 45.2 | 26.8 | 40.7% | 72% -> 94% |
| LLaMA-13B (batch=1) | 78.5 | 45.1 | 42.5% | 68% -> 91% |
| Stable Diffusion 3 (512x512) | 320.0 | 185.6 | 42.0% | 65% -> 89% |
| Mamba-2.8B (seq=8192) | 12.3 | 7.9 | 35.8% | 70% -> 88% |

Data Takeaway: The 40%+ latency reduction is consistent across different model architectures (pure Transformer, diffusion, state-space models). The memory bandwidth utilization jumps from the 60-70% range to the 90% range, indicating that CODA is effectively saturating the GPU's compute units rather than being bottlenecked by memory. This is a fundamental shift from a memory-bound to a compute-bound regime.

Key Players & Case Studies

CODA is the brainchild of a team led by Dr. Yujia Zhai, a former researcher at the University of Washington's systems lab, now heading a stealth startup. The team includes veterans from NVIDIA's cuDNN team and Google's XLA compiler group. Their track record includes contributions to the Triton compiler and the TVM deep learning compiler stack.

The primary competitive landscape includes:

- NVIDIA's TensorRT-LLM: The industry standard for LLM inference optimization. TensorRT-LLM uses operator fusion but typically at the level of fusing a GEMM with a bias add or activation. It does not perform whole-block fusion. CODA's approach is more aggressive.
- XLA (Accelerated Linear Algebra): Google's compiler for TPUs and GPUs. XLA performs some fusion but is constrained by its HLO (High-Level Operations) representation, which does not easily allow the register-level dataflow that CODA achieves.
- FlashAttention: A specific fusion of attention computation. FlashAttention is a subset of what CODA does—it fuses the attention mechanism but leaves the feed-forward and normalization layers separate. CODA subsumes FlashAttention.
- OpenAI's Triton: A language for writing custom GPU kernels. Triton allows experts to write fused kernels manually, but CODA automates this process at the compiler level.

Comparison Table:

| Solution | Fusion Scope | Automation Level | Latency Reduction (vs. Baseline) | Hardware Support |
|---|---|---|---|---|
| TensorRT-LLM | Operator-level (GEMM+Bias+Act) | High (automatic) | 20-30% | NVIDIA GPUs |
| XLA | Graph-level (limited fusion) | High (automatic) | 15-25% | TPU, NVIDIA, AMD |
| FlashAttention | Attention-only | Medium (manual kernel) | 25-35% (attention only) | NVIDIA, AMD |
| CODA | Whole Transformer block | High (compiler-driven) | 40-50% | NVIDIA (AMD planned) |

Data Takeaway: CODA's whole-block fusion provides a 2x improvement in latency reduction compared to the next best solution (TensorRT-LLM). The key differentiator is the automation level—CODA achieves this without requiring manual kernel writing, making it accessible to a wider range of models.

Industry Impact & Market Dynamics

CODA's arrival could fundamentally reshape the economics of AI inference. Currently, running a large language model (e.g., LLaMA-70B) requires an H100 cluster costing hundreds of thousands of dollars. With CODA, the same model could potentially run on a single RTX 4090 (or its successor) with acceptable latency for many use cases. This would democratize access to large models, enabling on-device AI for applications like real-time translation, local code assistants, and privacy-preserving chatbots.

The market for AI inference hardware is projected to grow from $18 billion in 2024 to $85 billion by 2030 (source: internal AINews market analysis). A significant portion of this growth is driven by cloud-based inference. CODA could shift the balance toward edge and on-device inference, reducing demand for expensive cloud GPUs and increasing demand for consumer-grade hardware.

Market Impact Projections:

| Metric | Before CODA (2024) | After CODA (2026 est.) | Change |
|---|---|---|---|
| Cost per 1M tokens (LLaMA-70B) | $0.50 (H100) | $0.10 (RTX 5090) | 80% reduction |
| % of inference on edge devices | 15% | 35% | +20pp |
| Average model size deployable on consumer GPU | 7B | 70B | 10x increase |
| New 'Compilation-as-a-Service' market size | $0 | $2B | New market |

Data Takeaway: The cost reduction and edge deployment potential are staggering. If CODA delivers on its promise, the AI industry could see a 10x increase in the model size deployable on consumer hardware, opening up entirely new product categories (e.g., local AI assistants, on-device video generation).

Risks, Limitations & Open Questions

Despite its promise, CODA faces several challenges:

1. Compiler Complexity: Whole-block fusion requires a sophisticated compiler that can handle arbitrary model architectures. The current implementation works well for standard Transformer blocks, but extending it to more exotic architectures (e.g., mixture-of-experts, multi-modal models) may require significant engineering effort.

2. Dynamic Shapes: CODA's tiling strategy assumes fixed tensor shapes. For models with dynamic sequence lengths (e.g., in chatbots), the compiler must either recompile for each shape or use a fallback path, which could negate some gains.

3. Hardware Compatibility: The current implementation is optimized for NVIDIA GPUs with Ampere or newer architectures. Porting to AMD or Intel GPUs will require significant work, as the register-level scheduling is highly architecture-specific.

4. Numerical Stability: Fusing operations can change the order of floating-point operations, potentially affecting numerical accuracy. While CODA uses techniques to mitigate this, there is a risk of subtle precision loss in edge cases.

5. Ecosystem Lock-in: If CODA becomes dominant, it could create a new dependency on a single compiler stack, similar to how cuDNN created NVIDIA lock-in. The open-source community will need to ensure that CODA remains portable.

AINews Verdict & Predictions

CODA is not just an incremental improvement; it is a paradigm shift in how we think about neural network execution. The operator-level optimization era is ending. The future belongs to program-level fusion, where the entire computation is treated as a single, optimized dataflow.

Our Predictions:

1. By 2026, CODA or a similar whole-block fusion technique will become the default execution mode for all major LLM inference frameworks. TensorRT-LLM and XLA will adopt similar approaches or risk obsolescence.

2. The 'Compilation-as-a-Service' model will emerge as a new business. Companies like CODA's startup will offer optimized, fused execution plans for specific model-hardware combinations, charging per-inference or per-deployment. This could become a multi-billion dollar market.

3. Consumer GPU demand will surge. As 70B-parameter models become runnable on a single RTX 5090, the value proposition of high-end consumer GPUs for AI work will skyrocket, potentially driving a new wave of hardware sales.

4. Video generation models will be the first major beneficiaries. Models like Sora and Stable Video Diffusion are heavily memory-bound due to their long sequence lengths. CODA's 40% latency reduction could make real-time video generation on consumer hardware a reality within two years.

5. The biggest risk is complacency. The AI industry has become accustomed to 'just add more GPUs' as a solution to scaling. CODA shows that software innovation can provide a 2x improvement without any hardware changes. We predict that the next wave of AI breakthroughs will come not from larger models, but from smarter execution.

What to Watch: The open-source release of CODA's compiler. If the team open-sources it, adoption will be rapid. If they keep it proprietary, expect a competitive response from NVIDIA and Google within 12 months.

More from Hacker News

UntitledIn a move that sent shockwaves through the enterprise AI community, Microsoft was forced to shut down its internal deploUntitledMicrosoft’s Agents League represents a radical departure from conventional AI evaluation. Instead of relying on static bUntitledThe fusion of large language models with formal verification engines has crossed a Rubicon. Systems like Google DeepMindOpen source hub3816 indexed articles from Hacker News

Related topics

inference optimization22 related articles

Archive

May 20262489 published articles

Further Reading

AI Inference Cost Cliff: Why 2026-2027 Will Separate Winners from LosersThe AI industry is fixated on training cost wars, but a more insidious crisis is brewing. Inference costs—the price of eSFHformer Fuses Fourier Transforms with Transformers for Image Restoration RevolutionSFHformer introduces a paradigm shift in image restoration by fusing Fast Fourier Transform (FFT) with Transformer archiGame Boy Color Runs Transformer: The Art of Extreme AI CompressionA developer has achieved the seemingly impossible: running a local Transformer language model on a 1998 Nintendo Game BoAI Inference Market Splits: Darwinian Specialization Reshapes the Competitive LandscapeThe era of one-size-fits-all AI inference is ending. AINews analysis reveals a Darwinian split where specialized inferen

常见问题

这次公司发布“CODA Rewrites Transformer Execution: One GEMM-Epilogue to Rule Them All”主要讲了什么?

For years, the AI industry has treated the Transformer as a sequence of discrete operations: a matrix multiply, a write to global memory, a Softmax read, another write, a LayerNorm…

从“CODA vs TensorRT-LLM latency comparison”看,这家公司的这次发布为什么值得关注?

CODA's core innovation lies in its treatment of the Transformer block as a single computational graph that is compiled into one fused GPU kernel. Traditional execution, as implemented in frameworks like PyTorch or Tensor…

围绕“CODA compiler open source release date”,这次发布可能带来哪些后续影响?

后续通常要继续观察用户增长、产品渗透率、生态合作、竞品应对以及资本市场和开发者社区的反馈。