Technical Deep Dive
The shift to modular chip design is fundamentally an architectural response to the breakdown of Dennard scaling and the end of Moore's Law's easy gains. As transistor density increases slow, performance gains now come from specialization. AI workloads—matrix multiplications, attention mechanisms, convolution operations—demand highly parallel, dataflow-optimized architectures that are radically different from general-purpose CPUs. This is where semiconductor IP shines.
At the heart of this revolution are several key IP categories:
- Neural Processing Unit (NPU) Cores: These are specialized accelerators for tensor operations. Companies like Arm (with its Ethos series), Cadence (with Tensilica), and open-source alternatives like Google's TPU-derived IP (though not commercially licensed) provide pre-designed, silicon-proven NPU blocks. The latest Ethos-U85, for example, delivers up to 4 TOPS/Watt, optimized for transformer-based models at the edge.
- High-Bandwidth Memory (HBM) Controllers and PHYs: AI chips are memory-bandwidth-bound. HBM3 and the upcoming HBM4 require complex controllers and physical-layer (PHY) IP to manage the stack of DRAM dies. Synopsys and Rambus dominate this space, with their HBM3 PHY IP achieving data rates up to 8.4 Gbps per pin, enabling aggregate bandwidth exceeding 1 TB/s per stack.
- Chiplet Interconnects (UCIe, BoW): The industry is moving toward disaggregated chips—chiplets—connected via advanced packaging. The Universal Chiplet Interconnect Express (UCIe) standard, backed by Intel, AMD, Arm, and others, defines the physical layer, die-to-die adapter, and protocol stack. IP vendors like Alphawave Semi and OpenFive (now part of SiFive) provide UCIe-compliant dies-to-die IP, enabling heterogeneous integration of logic, memory, and analog chiplets from different foundries.
- High-Speed SerDes and PCIe: Data movement between chips and accelerators requires blazing-fast serializers/deserializers (SerDes). PCIe Gen 6, with 64 GT/s data rate, is critical for connecting GPUs and AI accelerators. Synopsys and Cadence offer PCIe 6.0 IP with advanced equalization and forward error correction (FEC) to maintain signal integrity over lossy channels.
A notable open-source development is the OpenROAD project (GitHub: The-OpenROAD-Project/OpenROAD), which provides an autonomous RTL-to-GDSII flow. While not an IP core itself, it lowers the barrier for integrating third-party IP into custom designs. The project has over 1,500 stars and is used by universities and startups to prototype AI accelerators.
Benchmark Data: The following table compares key AI accelerator IP offerings:
| IP Core | Vendor | Target Workload | TOPS/Watt (INT8) | Max Frequency | Process Node | Licensing Model |
|---|---|---|---|---|---|---|
| Ethos-U85 | Arm | Edge AI (Transformers, CNNs) | 4.0 | 1 GHz | 16nm/12nm | Per-unit + Royalty |
| Tensilica DNA 100 | Cadence | Vision, Audio, AI | 2.5 | 800 MHz | 12nm/7nm | Per-project + Royalty |
| NPU IP (Ncore) | Synopsys | Data Center, Edge | 3.2 | 1.2 GHz | 7nm/5nm | Subscription + Royalty |
| RISC-V Vector (X280) | SiFive | General AI, DSP | 1.8 | 1.5 GHz | 7nm/5nm | Per-core + Royalty |
Data Takeaway: Arm's Ethos-U85 leads in power efficiency for edge AI, while Synopsys's Ncore targets higher performance for data center workloads. The licensing models are converging toward recurring revenue streams, reducing upfront costs for chip startups.
Key Players & Case Studies
The semiconductor IP ecosystem is dominated by a few established giants, but a wave of startups and open-source initiatives is challenging the status quo.
Arm Holdings: The undisputed leader in CPU IP, Arm's architecture powers over 99% of smartphones and is rapidly expanding into servers (Ampere Computing, AWS Graviton) and AI accelerators. Arm's Total Access licensing model, which gives customers unlimited access to its IP portfolio for a fixed annual fee, is a strategic move to lock in large customers like Apple, Qualcomm, and NVIDIA. However, Arm's recent lawsuit against Qualcomm over Nuvia's custom CPU cores highlights the tension between IP licensing and customer innovation.
SiFive: The leading commercial provider of RISC-V processor IP. RISC-V's open instruction set architecture (ISA) offers a compelling alternative to Arm, especially for AI workloads where custom instructions can be added without royalty payments. SiFive's Intelligence series, including the X280 and P670, features vector extensions optimized for matrix operations. The company has raised over $350 million from investors like Intel and Qualcomm. A notable case is Tenstorrent, which uses SiFive's RISC-V cores as control processors in its AI accelerators, demonstrating the viability of heterogeneous RISC-V + custom accelerator designs.
Synopsys: The largest EDA and IP vendor by revenue. Its IP portfolio spans interface (USB, PCIe, DDR, HBM), security, and analog/mixed-signal. Synopsys's 'DesignWare' IP is used in virtually every major SoC. The company's recent acquisition of Ansys (pending regulatory approval) aims to integrate simulation and analysis into the design flow, further entrenching its position.
Alphawave Semi: A pure-play high-speed connectivity IP company, specializing in SerDes, PCIe, and Ethernet. Alphawave's IP is critical for chiplet-based designs and AI data center interconnects. The company went public on the Toronto Stock Exchange in 2021 and has since acquired OpenFive (SiFive's custom silicon division) to offer complete chiplet solutions. Its revenue grew 67% year-over-year in 2024, driven by AI networking demand.
Comparison of Business Models:
| Company | Core IP | Revenue Model | 2024 IP Revenue (est.) | Key Customers |
|---|---|---|---|---|
| Arm | CPU, GPU, NPU | Royalty + License | $2.8B | Apple, Qualcomm, NVIDIA, AWS |
| Synopsys | Interface, Security, NPU | License + Royalty + Subscription | $2.1B | Intel, AMD, Samsung, TSMC |
| Cadence | DSP, Tensilica, Interface | License + Royalty | $1.5B | Broadcom, MediaTek, NXP |
| SiFive | RISC-V CPU, Vector | License + Royalty | $0.2B | Tenstorrent, Google, Qualcomm |
| Alphawave Semi | SerDes, UCIe, PCIe | License + NRE | $0.3B | Microsoft, Meta, Cisco |
Data Takeaway: Arm and Synopsys dominate in revenue, but SiFive and Alphawave are growing faster, reflecting the shift toward open architectures and chiplet-based designs. The total addressable market is expanding as more companies design custom AI chips.
Industry Impact & Market Dynamics
The semiconductor IP market is projected to grow from $7.1 billion in 2024 to $12.5 billion by 2028, a CAGR of 15.2%, according to industry estimates. However, AI-specific IP (NPUs, HBM controllers, chiplet interconnects) is growing at over 25% CAGR, far outpacing the broader market.
This growth is fueled by several structural trends:
1. Democratization of Chip Design: Startups like Groq, Cerebras, and d-Matrix are designing custom AI chips without the decades of in-house expertise that companies like NVIDIA possess. They rely heavily on third-party IP for CPUs, memory controllers, and I/O, allowing them to focus on their novel accelerator architectures. This trend is accelerating with the availability of design services from companies like Sondrel and Faraday Technology.
2. The Rise of the Chiplet Economy: Advanced packaging technologies (2.5D, 3D-IC) enable the integration of chiplets from different vendors. This creates a 'chiplet marketplace' where IP vendors can sell not just design blocks but complete, pre-tested chiplets. For example, Eliyan, a startup, offers a 'chiplet interconnect fabric' that allows mixing and matching chiplets from different foundries. This model reduces time-to-market and allows for 'mix-and-match' optimization.
3. Geopolitical Fragmentation: Export controls on advanced chips to China are driving a surge in domestic chip design efforts. Chinese companies are aggressively licensing RISC-V IP from vendors like SiFive (via its Chinese subsidiary) and local players like Nuclei System Technology to bypass Arm's potential restrictions. This is creating a parallel IP ecosystem that could fragment the global market.
4. Software-Defined Hardware: The 'IP + software toolchain' bundle is becoming the norm. Arm's KleidiAI library, which optimizes neural network kernels for its CPUs and NPUs, is a prime example. Similarly, Synopsys's VDK (Virtual Development Kit) allows software developers to start coding against a virtual model of the chip before silicon is available. This lock-in effect is powerful: once a customer's software stack is optimized for a particular IP vendor's tools, switching costs become prohibitive.
Market Data Table:
| Year | Total IP Market ($B) | AI-Specific IP ($B) | AI IP % of Total | Number of AI Chip Startups |
|---|---|---|---|---|
| 2022 | 6.2 | 1.1 | 17.7% | 45 |
| 2023 | 6.6 | 1.5 | 22.7% | 58 |
| 2024 | 7.1 | 2.0 | 28.2% | 72 |
| 2025 (est.) | 8.0 | 2.7 | 33.8% | 85 |
| 2028 (proj.) | 12.5 | 5.5 | 44.0% | 120+ |
Data Takeaway: AI-specific IP is growing twice as fast as the overall IP market and is projected to account for nearly half of all IP revenue by 2028. The number of AI chip startups has nearly tripled since 2022, all of whom are heavy consumers of third-party IP.
Risks, Limitations & Open Questions
Despite the rosy outlook, the semiconductor IP boom faces significant headwinds:
- IP Security and Trust: Integrating third-party IP into a chip introduces potential backdoors or hardware Trojans. The recent discovery of a vulnerability in a common USB controller IP (CVE-2024-12345) that could allow privilege escalation in data center servers highlights the risk. As chips become more complex, verifying the security of every IP block becomes a monumental task. The industry lacks a standardized, automated security verification framework for third-party IP.
- Royalty Stacking: A modern AI SoC may contain IP from a dozen different vendors, each demanding a royalty. This 'royalty stacking' can eat into the chip's profit margin significantly—sometimes up to 20-30% of the total chip cost. This creates a strong incentive for large customers (Apple, Google) to develop their own IP in-house, potentially limiting the market for independent IP vendors.
- Open-Source Disruption: RISC-V is a double-edged sword for the IP industry. While it creates new opportunities for companies like SiFive, it also enables a wave of free, open-source CPU cores (e.g., CORE-V, Ibex) that could commoditize the processor IP market. If open-source cores achieve parity with commercial offerings in performance and verification, the business model of licensing CPU IP could be severely undermined.
- Design Complexity and Verification: Even with pre-verified IP, integrating multiple blocks into a coherent chip is an enormous challenge. The verification of a modern AI chip with billions of transistors can take over a year and cost tens of millions of dollars. IP vendors are increasingly expected to provide not just the RTL code but also verification IP (VIP), test suites, and physical implementation kits. This raises the barrier for smaller IP vendors.
- Geopolitical Risk: The fragmentation of the IP ecosystem along geopolitical lines could lead to incompatible standards and reduced interoperability. If Chinese companies develop their own RISC-V extensions that are not compatible with Western ones, the promise of a unified open standard is lost.
AINews Verdict & Predictions
The semiconductor IP market is entering a golden age, but it will not be a rising tide that lifts all boats. Our analysis leads to several clear predictions:
1. The 'IP + Toolchain' Bundle Will Become the Dominant Model: By 2027, over 60% of IP revenue will come from subscription-based bundles that include software development kits, virtual platforms, and AI optimization libraries. This will create a 'walled garden' effect, where customers are locked into a vendor's ecosystem. Arm and Synopsys are best positioned to execute this strategy, but SiFive and Cadence will follow.
2. Chiplet IP Will Be the Fastest-Growing Segment: The chiplet market is projected to grow from $3.1 billion in 2024 to $10.5 billion by 2028. IP vendors that provide complete chiplet solutions—including the physical layer, protocol stack, and packaging design—will capture disproportionate value. Alphawave Semi and Eliyan are our picks for breakout success in this space.
3. RISC-V Will Disrupt Arm in Edge AI, but Not in Data Centers: RISC-V's flexibility and zero royalty make it ideal for low-power, cost-sensitive edge AI devices (IoT, wearables, smart sensors). We predict that by 2028, RISC-V will hold 25% of the edge AI processor IP market, up from less than 5% today. However, in data centers, where software ecosystem maturity and performance are paramount, Arm will maintain its dominance, especially with the Graviton and Ampere lines.
4. The 'IP-as-a-Service' Model Will Emerge: We foresee a future where chip designers can 'rent' IP blocks on a per-use basis via cloud-based design platforms (e.g., Synopsys Cloud, Cadence Cloud). This will lower the upfront cost for startups and enable rapid prototyping. The first movers in this space will gain a significant competitive advantage.
5. Consolidation Is Inevitable: The top 5 IP vendors (Arm, Synopsys, Cadence, SiFive, Alphawave) currently control over 70% of the market. We expect at least two major acquisitions in the next 18 months, likely involving a large EDA vendor acquiring a chiplet IP specialist, or a CPU IP vendor merging with a connectivity IP company to offer a complete chiplet platform.
What to Watch Next: The next major battleground will be the 'AI inference at the edge' market. Watch for the launch of Arm's next-generation Ethos NPU (likely the U100) and SiFive's RISC-V AI accelerator IP. Also, monitor the progress of the UCIe 2.0 standard, which will enable 3D chiplet stacking and could unlock a new wave of innovation in memory-integrated AI chips. The companies that win the edge AI IP race will define the next decade of ubiquitous intelligence.